PIC16F722A-I/SS【PDF 124/286 页】MCU PIC 3.5K FLASH XLP 28-SSOP

101h

TMR0

Timer0 Module Register

xxxx xxxx

99,34

102h(2)

PCL

Program Counter’s (PC) Least Significant Byte

0000 0000

103h(2)

STATUS

IRP

RP1

RP0

ZDC

0001 1xxx

22,34

104h(2)

FSR

Indirect Data Memory Address Pointer

xxxx xxxx

105h

—

Unimplemented

—

106h

—

Unimplemented

—

107h

—

Unimplemented

—

108h

CPSCON0

CPSON

—

CPSRNG1 CPSRNG0

CPSOUT

T0XCS

0--- 0000

121,3 5

109h

CPSCON1

—

CPSCH3

CPSCH2

CPSCH1

CPSCH0

---- 0000

122,3 5

10Ah(1, 2) PCLATH

—

Write Buffer for the upper 5 bits of the Program Counter

---0 0000

10Bh(2)

INTCON

GIE

PEIE

T0IE

INTE

RBIE

T0IF

INTF

RBIF

0000 000x

40,34

10Ch

PMDATL

Program Memory Read Data Register Low Byte

xxxx xxxx

10Dh

PMADRL

Program Memory Read Address Register Low Byte

xxxx xxxx

10Eh

PMDATH

—

Program Memory Read Data Register High Byte

--xx xxxx

10Fh

PMADRH

—

Program Memory Read Address Register High Byte

---x xxxx

Bank 3

180h(2)

INDF

Addressing this location uses contents of FSR to address data memory (not a physical register)

xxxx xxxx

181h

OPTION_REG

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

1111 1111

23,35

182h(2)

PCL

Program Counter (PC) Least Significant Byte

0000 0000

183h(2)

STATUS

IRP

RP1

RP0

ZDC

0001 1xxx

22,34

184h(2)

FSR

Indirect Data Memory Address Pointer

xxxx xxxx

185h

ANSELA

—

ANSA5

ANSA4

ANSA3

ANSA2

ANSA1

ANSA0

--11 1111

49,35

186h

ANSELB

—

ANSB5

ANSB4

ANSB3

ANSB2

ANSB1

ANSB0

--11 1111

58,35

187h

—

Unimplemented

—

18Ah(1, 2) PCLATH

—

Write Buffer for the upper 5 bits of the Program Counter

---0 0000